MPLR2025 Talk
Co-operative JIT Compilation for Resource-Constrained Low-Power Coprocessors
Go Suzuki, Takuo Watanabe, Sosuke Moriguchi
22nd ACM SIGPLAN International Conference on Managed Programming Languages and Runtimes (MPLR 2025), Singapore, Oct., 14, 2025. (to appear)
Abstract
As IoT devices evolve, their microcontroller systems-on-a-chip (SoCs) require higher performance, larger memory, and richer peripherals, resulting in increased power consumption. Integrating low-power (LP) coprocessors into SoCs offers a means to reduce power usage while preserving responsiveness, particularly in sensing tasks. However, LP coprocessors face memory capacity limitations and require complex, platform-specific development. These constraints often necessitate application refactoring and careful coordination of inter-processor communication.
We propose a JIT compilation design for managed languages to enhance the efficiency of LP coprocessor usage. These languages tend to increase code size due to dynamic dispatch and runtime checks. Our key idea is a cooperative approach: the interpreter on the main processor traces the application to compile only type-specialized basic blocks to be executed by the LP coprocessor. By combining trace-based compilation with lazy basic block versioning, the approach minimizes the code footprint and reduces processor interaction.
We implemented a prototype for a subset of the dynamically typed, object-oriented language mruby. We evaluated selected applications using LP coprocessors on ESP32-C6. Our evaluation shows that our design can achieve power savings comparable to handwritten C implementations with at most 6.6 times larger code size.
Artifacts
Publication
Go Suzuki, Takuo Watanabe, and Sosuke Moriguchi, Co-operative JIT Compilation for Resource-Constrained Low-Power Coprocessors, Proceedings of the 22nd ACM SIGPLAN International Conference on Managed Programming Languages and Runtimes (MPLR ’25), ACM, Oct., 2025. DOI:10.1145/3759426.3760980 (to appear)